1. Field of the Present Invention
The present invention is in the field of integrated circuit design and more particularly in the area of optimally locating objects within an integrated circuit layout.
2. History of Related Art
The layout of complex integrated circuits is typically achieved with the aid of computer based algorithms. Historically, the primary objective of such algorithms has been to minimize the interconnect (also referred to as a “net”) length and thereby minimize capacitive delay and energy loss. Among the most significant interconnect signals in the design of any integrated circuit is the clock tree. A clock tree distributes at least one clock signal from its source, a clock generator, to “sink” pins or clock pins of the circuit's synchronous objects. A circuit's synchronous objects include any objects that are designed to transition from one state to the next during transitions of the clock signal. These objects include latches, flip flops, and so forth.
The design of a circuit's clock tree is important because the clock tree consumes a significant portion of the device's overall power and because the clock tree design dictates limits on the circuit's performance. More specifically, a clock tree's latency and skew determine boundaries or limits on the achievable performance of the circuit. Latency refers to the signal's rise time or the amount of time required to drive the clock net from a first state (e.g. low) to a second state (e.g., high) while the skew refers to the maximum delay difference from the clock source to the various sinks.
The clock tree design is dictated in part by the placement of objects (cells) within the device. There are various algorithms to perform automated or assisted cell placement. One such algorithm, referred to as quadratic optimization, attempts to minimize a weighted sum of interconnect lengths or, more precisely, a weighted sum of squared interconnect lengths. In a conventional placement algorithm, the synchronous or latched objects and the non-latched objects are treated equivalently for purposes of object placement. As a result, conventional placement algorithms may produce a placement pattern in which the latched object placement pattern may be characterized as clustered or asymmetric. Because asymmetric latch placement tends to exhibit more clock skew, it would be desirable to implement a cell placement algorithm or method that produces more symmetrical latched object placement distributions.